World Library  
Flag as Inappropriate
Email this Article

SBus

Article Id: WHEBN0000184582
Reproduction Date:

Title: SBus  
Author: World Heritage Encyclopedia
Language: English
Subject: List of device bit rates, GSC bus, Sun Ultra series, Bus (computing), SPARCstation ZX
Collection: Computer Buses, Motherboard Expansion Slot, Sun Microsystems Hardware
Publisher: World Heritage Encyclopedia
Publication
Date:
 

SBus

SBus
}}
Four SBus connectors (top of photograph)
Year created 1989 (1989)
Created by Sun Microsystems
Superseded by PCI (1997)
Width in bits 32
Number of devices 8 masters, unlimited slaves
Speed 16.67 MHz - 25 MHz
Style Parallel
Two SBus cards
SBus male connector

SBus is a computer bus system that was used in most SPARC-based computers (including all SPARCstations) from Sun Microsystems and others during the 1990s. It was introduced by Sun in 1989 to be a high-speed bus counterpart to their high-speed SPARC processors, replacing the earlier (and by this time, outdated) VMEbus used in their Motorola 68020- and 68030-based systems and early SPARC boxes. When Sun moved to open the SPARC definition in the early 1990s, SBus was likewise standardized and became IEEE-1496. In 1997 Sun started to migrate away from SBus to the Peripheral Component Interconnect (PCI) bus, and today SBus is no longer used.[1]

The industry's first third-party SBus cards were announced in 1989 by Antares Microsystems; these were a 10Base-2 Ethernet controller, a SCSI-SNS host adapter, a parallel port, and an 8-channel serial controller.

The specification was published by Edward H. Frank and James D. Lyle.[1] A technical guide to the bus was published in 1992 in book form by Lyle,[2] who founded Troubador Technologies. Sun also published a set of books as a "developer's kit" to encourage third-party products.[3]

At the peak of the market over 250 manufacturers were listed in the SBus Product Directory, which was renamed to the SPARC Product Directory in 1996.

SBus is in many ways a "clean" design. It was targeted only to be used with SPARC processors, so most cross-platform issues were not a consideration. SBus is based on a big-endian 32-bit address and data bus, can run at speeds ranging from 16.67 MHz to 25 MHz, and is capable of transferring up to 100 MB/s. Devices are each mapped onto a 28-bit address space (256 MB). Only eight masters are supported, although there can be an unlimited number of slaves.

When the 64-bit UltraSPARC was introduced, SBus was modified to use clock doubling and transfer two 32-bit data words per cycle to produce a 200 MB/s 64-bit bus. This variant of the SBus architecture used the same 96-pin connector as the older one.

SBus cards had a very compact form factor for the time. A single-width card was 3 inches (76 mm) wide by 5 inches (130 mm) long and is designed to be mounted parallel to the motherboard. This allowed for three expansion slots in the slim "pizza box" enclosure of the SPARCstation 1.[4] The design also allows for double- or triple-width cards that take up two or three slots, as well as double-height (two 3x5 inch boards mounted in a "sandwich" configuration) cards.

SBus was originally announced as both a system bus and a peripheral interconnect that allowed input and output devices relatively low latency access to memory.[5] However, soon memory and central processing unit (CPU) speeds outpaced I/O performance. Within a year some Sun systems used MBus, another interconnection standard, as a CPU—memory bus. The SBus served as an input/output bus for the rest of its lifetime.

See also

References

  1. ^ a b "PCI:SBus Comparison" (PDF). Sun Microsystems. March 1999. Retrieved May 25, 2011. 
  2. ^ James D. Lyle (1992). SBus Information Applications and Experience. Springer-Verlag.  
  3. ^ Susan A. Mason (1994). SBus handbook. Sun Microsystems.  
  4. ^  
  5. ^ Edward H. Frank (February 26, 1990). "The SBus: Sun's high performance system bus for RISC workstations". Compcon Spring '90: Intellectual Leverage. Thirty-Fifth IEEE Computer Society International Conference: 189–194.  

External links

  • SBus Specification at Bitsavers
This article was sourced from Creative Commons Attribution-ShareAlike License; additional terms may apply. World Heritage Encyclopedia content is assembled from numerous content providers, Open Access Publishing, and in compliance with The Fair Access to Science and Technology Research Act (FASTR), Wikimedia Foundation, Inc., Public Library of Science, The Encyclopedia of Life, Open Book Publishers (OBP), PubMed, U.S. National Library of Medicine, National Center for Biotechnology Information, U.S. National Library of Medicine, National Institutes of Health (NIH), U.S. Department of Health & Human Services, and USA.gov, which sources content from all federal, state, local, tribal, and territorial government publication portals (.gov, .mil, .edu). Funding for USA.gov and content contributors is made possible from the U.S. Congress, E-Government Act of 2002.
 
Crowd sourced content that is contributed to World Heritage Encyclopedia is peer reviewed and edited by our editorial staff to ensure quality scholarly research articles.
 
By using this site, you agree to the Terms of Use and Privacy Policy. World Heritage Encyclopedia™ is a registered trademark of the World Public Library Association, a non-profit organization.
 


Copyright © World Library Foundation. All rights reserved. eBooks from Project Gutenberg are sponsored by the World Library Foundation,
a 501c(4) Member's Support Non-Profit Organization, and is NOT affiliated with any governmental agency or department.