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F14 Cadc

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Title: F14 Cadc  
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Subject: List of Intel microprocessors, Logic family
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F14 Cadc

The Central Air Data Computer is the integrated flight control system used in the early versions of the US Navy's F-14 Tomcat fighter. It is notable for its early use of a custom-designed MOS-based LSI microprocessor chipset, the MP944.[1]

The CADC was designed and built at Garrett AiResearch by a team led by Steve Geller and Ray Holt, and supported by the startup American Microsystems. Design work started in 1968 and was completed in June 1970, beating out a number of electromechanical systems that had also been designed for the F-14.

The CADC consisted of an A-to-D converter, several quartz pressure sensors, and the MOS-based microprocessor. Inputs to the system included the primary flight controls, a number of switches, static and dynamic air pressure (for calculating stall points and aircraft speed) and a temperature gauge. The outputs controlled the primary flight controls, wing sweep, the F-14's leading edge "glove", and the flaps.

The MP944 contained six chips used to build the CADC's microprocessor, all based on a 20-bit fixed-point-fraction two's complement number system. They were the Parallel Multiplier Unit (PMU), the Parallel Divider Unit (PDU), the Random Access Storage (RAS), the Read Only Memory (ROM), the Special Logic Function (SLF), and the Steering Logic Unit (SLU). The complete microprocessor system used one PMU, one PDU, one SLF, 3 RASs, 3 SLUs, and 19 ROMs.

Holt wrote an article for Computer Design magazine[2] about the system in 1971, but the Navy classified it, only releasing it in 1998. For this reason the CADC and MP944 remain fairly obscure in spite of their historical importance.

In the 1970s, most processors had no larger than 8-bit architectures. The 1971 Intel 4004 was only 4 bits, up to 740 kHz; the 1972 Intel 8008 had max of 500 kHz and 8-bit word. This made them far slower than the 1970 F-14 Tomcat's MP944, with it 375 kHz and 20-bit word size.[3][4]


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