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Cache invalidation

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Title: Cache invalidation  
Author: World Heritage Encyclopedia
Language: English
Subject: Parallel computing, Cache coherency, Direct memory access, Bcache, Yield method
Collection: Cache Coherency
Publisher: World Heritage Encyclopedia

Cache invalidation

Cache invalidation is a process whereby entries in a cache are deleted. It can be done explicitly, as part of a cache coherence protocol in a parallel computer. In such a case, a compute node changes a variable and then invalidates the cached values of that variable across the rest of the computer system.

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