World Library  
Flag as Inappropriate
Email this Article

CLMUL instruction set


CLMUL instruction set

Carry-less Multiplication (CLMUL) is an extension to the x86 instruction set used by microprocessors from Intel and AMD which was proposed by Intel in March 2008[1] and made available in the Intel Westmere processors announced in early 2010. The purpose is to improve the speed of applications doing block cipher encryption in Galois/Counter Mode, which depends on finite field multiplication. Finite field (GF(2k)) multiplication can be implemented more efficiently[2] with the new CLMUL instructions than with the traditional instruction set.[3] Another application is the fast calculation of CRC values.[4]


  • New instructions 1
  • CPUs with CLMUL instruction set 2
  • See also 3
  • References 4

New instructions

The instruction computes the 128-bit product of two 64-bit values. The destination is a 128-bit XMM register. The source may be another XMM register or memory. An immediate operand specifies which halves of the 128-bit operands are multiplied. Mnemonics specifying specific values of the immediate operand are also defined:
Instruction Opcode Description
PCLMULQDQ xmmreg,xmmrm,imm [rmi: 66 0f 3a 44 /r ib] Perform a carry-less multiplication of two 64-bit polynomials over the finite field GF(2).
PCLMULLQLQDQ xmmreg,xmmrm [rm:  66 0f 3a 44 /r 00] Multiply the low halves of the two registers.
PCLMULHQLQDQ xmmreg,xmmrm [rm:  66 0f 3a 44 /r 01] Multiply the high half of the destination register by the low half of the source register.
PCLMULLQHQDQ xmmreg,xmmrm [rm:  66 0f 3a 44 /r 10] Multiply the low half of the destination register by the high half of the source register.
PCLMULHQHQDQ xmmreg,xmmrm [rm:  66 0f 3a 44 /r 11] Multiply the high halves of the two registers.

CPUs with CLMUL instruction set

The presence of the CLMUL instruction set can be checked by testing one of the CPU feature bits.

See also


  1. ^ "Intel Software Network". Intel. Retrieved 2008-04-05. 
  2. ^ "Intel Carry-Less Multiplication Instruction and its Usage for Computing the GCM Mode - Rev 2". 
  3. ^ Detailed description of instructions on Intel website
  4. ^ "Fast CRC Computation for Generic Polynomials Using PCLMULQDQ". 
  5. ^ Dave Christie (6 May 2009). "Striking a balance". AMD Developer blogs. Retrieved 2011-03-11. 
  6. ^ "Slide detailing improvements of Jaguar over Bobcat". AMD. Retrieved August 3, 2013. 
This article was sourced from Creative Commons Attribution-ShareAlike License; additional terms may apply. World Heritage Encyclopedia content is assembled from numerous content providers, Open Access Publishing, and in compliance with The Fair Access to Science and Technology Research Act (FASTR), Wikimedia Foundation, Inc., Public Library of Science, The Encyclopedia of Life, Open Book Publishers (OBP), PubMed, U.S. National Library of Medicine, National Center for Biotechnology Information, U.S. National Library of Medicine, National Institutes of Health (NIH), U.S. Department of Health & Human Services, and, which sources content from all federal, state, local, tribal, and territorial government publication portals (.gov, .mil, .edu). Funding for and content contributors is made possible from the U.S. Congress, E-Government Act of 2002.
Crowd sourced content that is contributed to World Heritage Encyclopedia is peer reviewed and edited by our editorial staff to ensure quality scholarly research articles.
By using this site, you agree to the Terms of Use and Privacy Policy. World Heritage Encyclopedia™ is a registered trademark of the World Public Library Association, a non-profit organization.

Copyright © World Library Foundation. All rights reserved. eBooks from Project Gutenberg are sponsored by the World Library Foundation,
a 501c(4) Member's Support Non-Profit Organization, and is NOT affiliated with any governmental agency or department.